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There is a smallish (~$5G) company called Cadence. Their flagship product is called ncsim. It simulates hardware models written in high-level languages such as Verilog and VHDL. Verilog allows you to open files in your hardware description code. Handy for debugging. ncsim allows you to open at most 32 files at a time. Have you ever heard of a more retarded fixed size limit? I have to point out that 32 bits doesn't mean 32 values, because, you know, you can play with those bits, have some of them 1 and some 0, and that gives you a lot of options. I bet someone at Cadence knows that. If they convert fds to bitmasks because there is a function $print_to_many_files receiving a mask, then whoever invented this function is a moron. DISCLAIMER: This is an order of magnitude more brain-crippled than anything I've ever seen, especially considering the general level of software by Cadence. Hence, as a special exception, if there is a good excuse for this behavior, I will *apologize*. An example of a good excuse: "you probably have an env var $FUCK_ME_HARDER_CADENCE set, and this leads to the 32 fds limit as documented in big bold letters in the manual". An example of a bad excuse: "you should set an env var $PLEASE_DONT_FUCK_ME_SO_HARD_CADENCE, which removes the 32 fds limit as documented in small italic letters in the manual".
Generated at 06:02 on 21 Feb 2007 by mariachi 0.52